A Brief History of Modern ESD Transmission Line Pulsing

Using square waves to characterize semiconductor devices has been around for at least 40 years as noted in the "mother of all ESD works" of Wunch and Bell at BDM Corporation in the 1960's. They solved the 1-D heat equation for silicon melting to predict bipolar and diode failure thresholds of nuclear electromagnetic pulses. Maloney, a silicon technologist at Intel in the mid 1980's developed a circuit based modeling methodology based on a charged transmission line for integrating ESD diodes on chip, a significant step forward to solve the messy problem of ESD in VLSI IC's. Subsequently in the late 1980's, several silicon technologists Ameraskera and Roozendaal et al at Philips Corporation, Texas Instruments Roundtree, Chatterjee, Duvvury et al, Consiglio and Morgan at AMD, built other versions of Maloney's machine. Consiglio went on to refine the design, and perfect application of the machine at LSI Logic and VLSI in the early 1990's. Machines at LSI and VLSI companies were used between four and seven years. The VLSI TLP hardware design (patent # 5,519,327) is widely copied today to the chagrin of certain equipment manufacturers. The VLSI machine resides somewhere in the electrical engineering department at Stanford University. The LSI TLP algorithm (patent #5,410,254) is also widely used today. The Impulse Semiconductor TLP design (patent # 5,804,977) filed in 1997 by Consiglio incorporates all features of a modern 50 ohm design, including RF matching networks.